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integrated circuit design
Atak, O., A. Atalar, E. Arikan, H. Ishebabi, D. Kammler, G. Ascheid, H. Meyr, M. Nicola, and G. Masera, "Design of Application Specific Processors for the Cached FFT Algorithm", *IEEE International Conference on Acoustics, Speech and Signal Processing, vol. 3, pp. III, 05/2006.
IEEE 802.11n transceiver
Nicola, M., A. Dassatti, G. Masera, A. Concil, and A. Poloni, "Mixed hardware-software testbed for IEEE-802.11n", *2nd International Conference on Testbeds and Research Infrastructures for the Development of Networks and Communities TRIDENTCOM 2006. , pp. 8 pp. -478, 2006.
field programmable gate arrays
Dassatti, A., G. Masera, M. Nicola, A. Concil, and A. Poloni, "High performance channel model hardware emulator for 802.11n", Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on, pp. 303 - 304, dec., 2005.
interleaved codes
Martina, M., M. Nicola, and G. Masera, "Hardware design of a low complexity, parallel interleaver for WiMax duo-binary turbo decoding", IEEE Communications Letters, vol. 12, no. 11, pp. 846 -848, 11/2008.
GPS receivers
Motella, B., M. Pini, M. Fantino, P. Mulassano, M. Nicola, J. Fortuny-Guasch, M. Wildemeersch, and D. Symeonidis, "Performance assessment of low cost GPS receivers under civilian spoofing attacks", 5th ESA Workshop on Satellite Navigation Technologies and European Workshop on GNSS Signals and Signal Processing (NAVITEC), pp. 1 -8, 12/2010.
GNSS-aided network
Digenti, S., M. Nicola, M. Pini, and L. Lo Presti, "Technique for the estimation of PC clock offset in a GNSS-aided network of collaborative users", Satellite Navigation Technologies and European Workshop on GNSS Signals and Signal Processing (NAVITEC), 2010 5th ESA Workshop on, pp. 1 -8, 12/2010.
innovative embedded platform
Dassatti, A., G. Masera, M. Nicola, and F. Vacca, "Low resources algorithm for video surveillance", * International Symposium on Communications and Information Technologies ISCIT '07, pp. 462 -467, 10/2007.

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